GATE EC 2014 Question Paper (15-Feb-2014) (Shift 2)

When a silicon diode having a doping concentration of N${}_A$ = 9 × 10¹⁶ /cm³ on p-side and N${}_D$ = 1 × 10¹⁶/cm³ on the n-side is reverse biased, the total depletion width is found to be 3 μm. Given that the permittivity of silicon is 1.04 × 10⁻¹² F/cm, the depletion width on the p-side and the maximum electric field in the depletion region, respectively, are

The diode in the circuit shown has V ₒₙ= 0.7 Volts but is ideal otherwise.

If V ᵢ= 5 sin (ωt) Volts, the minimum and maximum values of V ₀(in Volts) are, respectively,

For the n-channel MOS transistor shown in the figure, the threshold voltage V${}_{Th}$ is 0.8 V. Neglect channel length modulation effects. When the drain voltage V${}_D$ = 1.6 V, the drain current I${}_D$ was found to be 0.5 mA. If V${}_D$ is adjusted to be 2 V by changing the values of r and V${}_{DD}$, the new value of I${}_D$ (in mA) is

For the MOSFETS shown in the figure, the threshold voltage |Vₜ| = 2 V and $K=\frac{1}{2}\mu C_{ox}\left(\frac{W}{L}\right)=0.1mA/V^2.$

The value of I${}_D$ (in mA) is _________

In the circuit shown, choose the correct timing diagram of the output (y) from the given waveforms w₁, w₂, w₃ and w₄