GATE EC 2020 Question Paper (02-Feb-2020) (Shift 2)

An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to – 10 V. If the input voltage V${}_I$ lies between ± 10 V, the minimum and the maximum values of V${}_G$ required for proper sampling and holding respectively, are

Using the incremental low-frequency small-signal model of the MOS device, the Norton equivalent resistance of the following circuit is

P, Q, and R are the decimal integers corresponding to the 4-bit binary number 1100 considered in signed magnitude, 1’s complement, and 2’s complement representations, respectively. The 6-bit 2’s complement representation of (P + Q + R) is

The state diagram of a sequence detector is shown below. State S₀ is the initial state of the sequence detector. If the output is 1, then

The characteristic equation of a system is

$s^3+3s^2+\left(K+2\right)s+3K=0$

In the root locus plot for the given system, as K varies from 0 to ∞, the break-away or break-in point(s) lie within