GATE EC 2021 Question Paper (07-Feb-2021) (Shift 2)

Consider the signals x[n] = 2ⁿ⁻¹ u[-n + 2] and y[n] = 2⁻ⁿ⁺² u[n + 1], where u[n] is the unit step sequence. Let X(e${}^{j\omega }$) and Y(e${}^{j\omega }$) be the discrete-time Fourier transform of x[n] and y[n], respectively. The value of the integral

$\frac{1}{2\pi }{\int }_0^{2\pi }X(e^{j\omega })Y(e^{-j\omega })d\omega$

(rounded off to one decimal place) is _____

A silicon P-N junction is shown in the figure. The doping in the P region is 5 × 10¹⁶ cm⁻³ and doping in the N region is 10 × 10¹⁶ cm⁻³. The parameters given are

Built-in voltage (Φ${}_{bi}$) = 0.8 V

Electron charge (q) = 1.6 × 10⁻¹⁹ C

Vacuum permittivity (ε₀) = 8.85 × 10⁻¹² F / m

Relative permittivity of silicon (ε${}_{Si}$) = 12



The magnitude of reverse bias voltage that would completely deplete one of the two regions (P or N) prior to the other (rounded off to one decimal place) is _______ V.

An asymmetrical periodic pulse train vᵢₙ of 10 V amplitude with on-time T${}_{ON}$ = 1 ms and off-time T${}_{OFF}$ = 1 μs is applied to the circuit shown in the figure. The diode D₁ is ideal.



The difference between the maximum voltage and minimum voltage of the output waveform v₀ (in integer) is _____V

For the transistor M` in the circuit shown in the figure, μn Cox = 100μA/V^2 and (W/L) = 10, where μn is the mobility of electron, Cox is the oxide capacitance per unit area, W is the width and L is the length.



The channel length modulation coefficient is ignored. If the gate-to-source voltage VGS is 1 V to keep the transistor at the edge of saturation, then the threshold voltage of the transistor (rounded off to one decimal place) is _____ V.

A circuit with an ideal OPAMP is shown in the figure. A pulse V${}_{IN}$ of 20 ms duration is applied to the input. The capacitors are initially uncharged,



The output voltage V${}_{OUT}$ of this circuit t = 0⁺ (in integer) is ______V.