GATE EE 2019 Question Paper (09-Feb-2019) (Shift 2)

Given, V${}_{gs}$ is the gate-source voltage, V${}_{ds}$ is the drain source voltage, and Vₜₕ is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are

A current controlled current source (CCCS) has an input impedance of 10 Ω and output impedance of 100 kΩ. When this CCCS is used in a negative feedback closed loop with a loop gain of 9, the closed loop output impedance is

If f = 2x³ + 3y² + 4z, the value of line integral $\underset{C}{\int }\mathrm{gradf}.\mathrm{dr}$ evaluated over contour C formed by the segments (-3, -3, 2) → (2, -3, 2) → (2, 6, 2) → (2, 6, -1) is ________.

The current I flowing in the circuit shown below in amperes (round off to one decimal place) is ________.

A co-axial cylindrical capacitor shown in Figure (i) has dielectric with relative permittivity εᵣ₁ = 2. When one-fourth portion of the dielectric is replaced with another dielectric of relative permittivity εᵣ₂, as shown in Figure (ii), the capacitance is doubled. The value of εᵣ₂ is ______.