GATE IN 2018 Question Paper (04-Feb-2018) (Shift 2)

The diodes given in the circuit are ideal. At t= 60 ms, V${}_{pq}$ (in Volts) is

For the 3-bit binary counter shown in the figure, the output increments at every positive transition in the clock (CLK). Assume ideal diodes and the starting state of the counter as 000. If output high is 1 V and output low is 0 V, the current I(in mA) flowing through the 50Ω resistor during the 5${}^{th}$ clock cycle is (up to one decimal place) ______.

The representation of the decimal number (27.625)₁₀ in base-2 number system is

The number of comparators required for implementing an 8-bit flash analog-to-digital converter is

A voltage of 6 cos(100πt) V is fed as y-input to a CRO. The waveform seen on the screen of the CRO is shown in the figure. The Y and X axes settings for the CRO are respectively