GATE EC 2013 Question Paper (10-Feb-2013) (Shift 2)

In the circuit shown below the op-amps are ideal. Then Vout in volts is

In the circuit shown below, the BJT has negligible collector to emitter saturation voltage and the diode drops negligible voltage across it under Forward bias. If V${}_{CC}$ is +5V, X and Y are digital signals with 0 V as logic 0 and V${}_{CC}$ as logic 1, then the Boolean expression for Z is

A voltage 1000 sin ωt V is applied across YZ. Assuming ideal diodes, the voltage measured across WX in volts is

Three capacitors C₁, C₂ and C₃ whose values are 10 μF, 5 μF, and 2 μF respectively, have breakdown of 10 V, 5 V and 2 V respectively. For the interconnection shown below, the maximum safe voltage in Volts that can be applied across the combination, and the corresponding total charge in μC stored in the effective capacitance across the terminals are respectively

There are four chips each of 1024 bytes connected to a 16-bit address bus as shown in the figure below. RAMs 1, 2, 3, and 4 respectively are mapped to addresses.