GATE EC 2015 Question Paper (01-Feb-2015) (Shift 1)

For the circuit shown in the figure, the Thevenin equivalent voltage (in Volts) across terminals a-b is __________.

In the circuit shown, the voltage V${}_X$ (in Volts) is _________.

At very high frequencies, the peak output voltage V₀ (in Volts) is __________.

Which one of the following processes is preferred to form the gate dielectric (SiO₂) of MOSFETs?

If the base width in a bipolar junction transistor is doubled, which one of the following statements will be TRUE?