GATE EC 2015 Question Paper (31-Jan-2015) (Shift 2)

If the circuit shown has to function as a clamping circuit, which one of the following conditions should be satisfied for sinusoidal signal of period T?

In the circuit shown, V₀ = V${}_{0A}$ for switch SW in position A and V₀ = V${}_{0B}$ for SW in position B. Assume that the Op-Amp is ideal. The value of $\frac{{\mathrm{V}}_{0\mathrm{B}}}{{\mathrm{V}}_{0\mathrm{A}}}$ is ______.

In the bistable circuit shown, the ideal Op-Amp has a saturation level of ± 5V. The value of R₁(in k Ω) that gives a hysteresis width of 500 mV is __________.

In the figure shown, the output Y is required to be Y = A.B + C̅.D̅. The gates G₁ and G₂ must be respectively.

In an 8085 microprocessor, which one of the following instructions changes the content of the accumulator?