PYQs Based Test - 07 : Digital Electronics

If (1235)ₓ = (3033)${}_y$, where x and y indicate the bases of the corresponding numbers, then

Consider the 2-bit multiplexer (MUX) shown in the figure. For OUTPUT to be the XOR of C and D, the values for A₀, A₁, A₂, and A₃ are ________.

A traffic signal cycles from GREEN to YELLOW, YELLOW to RED and RED to GREEN. In each cycle, GREEN is turned on for 70 seconds, YELLOW is turned on for 5 seconds and the RED is turned on for 75 seconds. This traffic light has to be implemented using a finite state machine (FSM). The only input to this FSM is a clock of 5 second period. The minimum number of flip-flops required to implement this FSM is ________ .

The propagation delays of the XOR gate, AND gate, and multiplexer (MUX) in the circuit shown in the figure are 4 ns, 2 ns, and 1 ns, respectively.



If all the inputs P, Q, R, S, and T are applied simultaneously and held constant the maximum propagation delay of the circuit is

A mod–n counter using a synchronous binary up–counter with synchronous clear input is shown in the figure. The value of n is_________.